Currently, a key issue in the phase path of polar modulators, is the gain variation as well as the nonlinear tuning characteristic of the tunable oscillator (e.g. digitally controlled oscillator, DCO). Especially for wideband modulation signals, the implementation of a very linear DCO gets difficult due to the intrinsic nonlinear characteristic given by the typically used 1/sqrt(LC) frequency function. However, also when used as a frequency synthesizer, the DCO nonlinearity and the large gain variation lead to unwanted degradation of the PLL output signal quality (such as EVM or Error Vector Magnitude and phase noise). Additionally, temperature drifts of the DCO frequency have to be covered by the fine tuning range, which increases the required linear range of the DCO tuning input.
To guarantee a well defined loop gain, the DCO gain can be compensated by a digital gain. However, the gain has to be measured on-chip in order to have an actual value for the current process, temperature and supply voltage conditions. For continuously running systems like UMTS or LTE, this becomes even more difficult as the gain usually drifts when the temperature changes, and thus a one-time measurement can be insufficient. Especially when used in a polar modulator, the very stringent requirement on modulation gain requires a continuous tracking of the DCO gain during system operation. This leads to additional power and area consumption for the required circuitry.
To compensate for a DCO tuning nonlinearity, a linearization can be done either at the DCO circuit or at the digital tuning data. However, this adds significant complexity to the PLL circuit, resulting in higher power consumption and long implementation times for the oscillator circuits.
In a rather new development, the phase modulation is added after the PLL by using a digital-to-time converter (DTC). This improves the modulation linearity, as DTCs are usually more linear compared to DCOs. Also, the gain can be defined quite well, if for example the DTC uses a DLL (Delay Locked Loop) to generate the phase delay. This enables polar modulation of very wideband standards like LTE-Advanced, as for DCO-based modulators, a very large modulation frequency range is difficult to achieve. However, as the unmodulated carrier is generated by a conventional PLL, the problems of the frequency synthesizer remain.
Therefore, conventional systems are disadvantageous in that a problem of a nonlinearity and a gain variation arises for both the frequency synthesizer and the phase modulator.